INSTRUCTION SET ARCHITECTURE

The Instruction Set Architecture of a processor defines the various functions that the processor can perform.  An Instruction Set Architecture includes the following:

•          Instructions and Instruction Formats
•          Addressing modes
•          Data types and size
•          Programmable storage : Registers and memory
•          Interrupts
•          Input and Output

Assembly language program is made up of the instructions in the Instruction Set Architecture. The Instruction Set Architecture serves as an interface between the hardware and the system software like Operating system, Device Drivers, Compilers, etc

Instruction Set Architecture: An Interface between hardware and system software

Key ISA Decisions

The ISA of a processor can be described using 5 catagories:

Operations

What operations the processor will perform. (eg. Integer Addition, Floating Point Addition, Multiplication, String Comparison, etc)

Operand Storage in the CPU

Where are the operands kept other than in memory? (Register, Stack, Accumulator)

Operand location

Can any ALU instruction operand be located in memory? Or must all operands be kept internally in the CPU? (Register-Memory, Memory-Memory, Register-Register architectures)

Number of explicit named operands

How many operands are there in a typical instruction. (Three, Two, One and Zero address instructions)

Type and size of operands

What is the type and size of each operand and how is it specified? (Integer – 2 bytes, etc)

Classification of ISA (or) Types of ISA

Based on the internal storage of operands, the ISA can be classified as: Stack, Accumulator and General Purpose Register Architecture.

Stack Architecture: The operands are implicitly on the top of the stack. It uses  zero address instruction for ALU operations.

E.g:         ADD       Top two elements of the stack are added and result is pushed back    into the      top of the stack

Accumulator Architecture: One of the operand is implicitly in the Accumulator. It uses one address instruction.

 E.g:        ADD B    The content of memory location B is added with the content of  Accumulator and the result is stored back into the accumulator.

General Purpose Register Architecture: All the operands are explicitly mentioned, they are either registers or memory locations.

            Register – Register Architecture: Also called LOAD-STORE architecture where all the     operands are in the processor register. It uses three address instructions for ALU operations

   ADD R1, R2, R3      ;  R3 <- [R1] + [R2]

Register – Memory Architecture:  One of the operand is in memory and the other operand is in register

    ADD A, R1              ;  R1 <- [A] + [R1]

                                         A denotes memory location and R1 denotes register

            Memory – Memory Architecture:  All the operands are in the memory

    Add A, B, C           ; C <- [A] + [B]

                                       A  and B denotes memory locations

Classification of CPU Architecture based on the Internal Storage of Operands

TOS : Top of Stack

 The assembly code of C = A + B in all the above architectures is given below:

Stack Architecture	Accumulator Architecture	General Purpose Register Architecture
		Register- Register	Register-Memory	Memory-Memory
PUSH A PUSH B ADD POP C	LOAD A ADD B STORE C	LOAD A, R1 LOAD B,R2 ADD R1,R2,R3 STORE R3,C	LOAD A, R1 ADD B,R2 STORE R2,C	ADD A,B,C

Stack Architecture

Advantage: Simple model with short instructions

Disadvantage: Hard to generate efficient code

Accumulator Architecture

Advantage: Short instruction

Disadvantage: Since Accumulator is the only temporary storage, memory traffic is more

Register-Register Architecture (or) Load-Store Architecture

Advantages:

•         Simple, fixed-length instructions
•         The average CPI (cycles per instruction) is less and hence enables efficient pipelining

Disadvantages:

•          More number of instructions
•          Since it uses fixed length instructions, bit encoding may be wasteful for small instructions

Register-Memory Architecture

Advantage: Easy to encode

Disadvantage: CPI varies based on operand location

Memory-Memory Architecture

Advantages:

•          Less instruction count
•          Uses variable length instructions

Disadvantages:

•          Average CPI is larger so pipelining is not very efficient
•          Memory traffic is more